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{{Academy-Engineering}} | {{Academy-Engineering}} | ||
[[Image:Computer.gif|thumb|Breakdown Of Main Computer|left]] | [[Image:Computer.gif|thumb|Breakdown Of Main Computer|left]] | ||
The main computer is probably the most important operational element of a starship next to the crew. The computer is directly analogous to the autonomic nervous system of a living being, and is responsible in some way for the operation of every other system of the ship. | The main computer is probably the most important operational element of a starship next to the crew. The computer is directly analogous to the autonomic nervous system of a living being, and is responsible in some way for the operation of every other system of the ship. | ||
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==Computer Cores== | ==Computer Cores== | ||
The heart of the main system is a set of three main processing cores. Any of these cores is able to handle the primary operational computing load of the entire vessel. Two of these cores are located near the center of the Primary Hull under the Engineering Hull.Each main core incorporates a series of miniature subspace field generators, which creates a symmetrical field distortion of 3350 millicochranes within the faster-than-light core elements.This permits the transmission and processing of optical data within the core at rates significantly exceeding lightspeed.The two main cores in the Primary Hull run in parallel clock-sync with each other, proceeding 100% redundancy. In the event of any failure in either core, the other core is able to instantly assume the total computing load for the ship with no interruption, although some secondary and recreational functions may be suspended. The third core, located in the engineering hull, serves as a backup to the first two. Core elements are based on faster -than -light nanaprocessor units arranged into optical translator clusters of 1,025 segments. In turn, clusters are grouped into processing modules composed of 256 clusters controlled by a bank of sixteen isolinear chips. Each core comprises seven primary and three upper levels, each level containing an average of four modules. | The heart of the main system is a set of three main processing cores. Any of these cores is able to handle the primary operational computing load of the entire vessel. Two of these cores are located near the center of the Primary Hull under the Engineering Hull. Each main core incorporates a series of miniature subspace field generators, which creates a symmetrical field distortion of 3350 millicochranes within the faster-than-light core elements. This permits the transmission and processing of optical data within the core at rates significantly exceeding lightspeed.The two main cores in the Primary Hull run in parallel clock-sync with each other, proceeding 100% redundancy. In the event of any failure in either core, the other core is able to instantly assume the total computing load for the ship with no interruption, although some secondary and recreational functions may be suspended. The third core, located in the engineering hull, serves as a backup to the first two. Core elements are based on faster-than-light nanaprocessor units arranged into optical translator clusters of 1,025 segments. In turn, clusters are grouped into processing modules composed of 256 clusters controlled by a bank of sixteen isolinear chips. Each core comprises seven primary and three upper levels, each level containing an average of four modules. | ||
==Core Memory== | ==Core Memory== | ||
Memory storage for main core usage is provided by 2,048 dedicated modules of 144 isolinear optical storage chips. Under LCARS software control, these modules provide average dynamic access to memory at 4,600 kiloquads/sec. Total storage capacity of each module is about 630,000 kiloquads, depending on software configuration. The main cores are tied into the ship's [[Optical Data Network]] by means of a series of MJL junctions links which bridge the subspace boundary layer. There is a 12% Doppler loss in transmission rate across the boundary but the resulting increase in processing speed from the faster-than-light elements more than compensates. | Memory storage for main core usage is provided by 2,048 dedicated modules of 144 isolinear optical storage chips. Under [[LCARS]] software control, these modules provide average dynamic access to memory at 4,600 kiloquads/sec. Total storage capacity of each module is about 630,000 kiloquads, depending on software configuration. The main cores are tied into the ship's [[Optical Data Network]] by means of a series of MJL junctions links which bridge the subspace boundary layer. There is a 12% Doppler loss in transmission rate across the boundary but the resulting increase in processing speed from the faster-than-light elements more than compensates. | ||
==Sub Processors== | ==Sub Processors== | ||