USS Challenger: Difference between revisions

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The Challenger's capabilities far exceed it's battle hardened exterior, to a crew of individuals who aspire to uphold the values of Starfleet and the desire to "see what's out there". The Borg, The Dominion, The Romulans...these are entities that the crew have faced, they will rely on their rememberances to help guide them as the future unfolds before them.
The Challenger's capabilities far exceed it's battle hardened exterior, to a crew of individuals who aspire to uphold the values of Starfleet and the desire to "see what's out there". The Borg, The Dominion, The Romulans...these are entities that the crew have faced, they will rely on their rememberances to help guide them as the future unfolds before them.


 
==Challenger Computer Core System==
Computer System
The main computer system of any Starfleet vessel is arguably the most important single system used in the operation of the ship other than the crew. In many respects, the computer network is the central nervous system of the starship, and in many respects, is responsible for the operation and maintenance of every single system aboard the starship.
Crew interface for the computer system is maintained through the Library Computer and Retrieval System, or LCARS. The LCARS provides both tactile and auditory input for the users, incorporating highly specialized artificial intelligence subroutines and graphic displays for maximum ease of usage.
Number of computer cores
Two; The primary core one occupies space on decks 7, 8 and 9 far astern. The secondary, emergency core is much smaller than the first and is located adjacent to Enviromental Control on Deck 16.
The Core elements are based on FTL nanoprocessor units arranged into optical transtator clusters of 1,024 segments. In turn, each cluster is grouped into processing modules composed of 256 clusters controlled by a bank of sixteen isolinear chips. Each core comprises seven primary and three upper levels, each level containing an average of four modules.
Type of computer cores
The updated Computer cores found on the Akira-class are newer versions of the Galaxy Class Isolinear Processing cores. The system is powered by a smaller, regulated EPS conduit directly from the warp core. Cooling of the isolinear loop is accomplished by a regenerative liquid nitrogen loop, which has been refit to allow a delayed-venting heat storage unit for "Silent Running." For missions, requirements on the computer core rarely exceed 45-50% of total core processing and storage capacity. The rest of the core is utilized for various scientific, tactical, or intelligence gathering missions - or to backup data in the event of a damaged core. Each core incorporates miniature subspace generators, which creates a symmetrical, nonpropulsive, field distortion of 3350 millicochranes within the faster-than-light (FTL) core elements. This permits data to be processed and passed at rates far exceeding the speed of light.
Core Memory
Main memory storage for the primary computer core is provided by 2,048 dedicated modules of 144 isolinear optical storage chips. Under LCARS software control, these modules provide access to memory averaging around 4600 kiloquads/second. Total storage capacity of each module is about 630,000 kiloquads, depending on the current LCARS software configuration.
Subprocessors
A network of 200 quaditronic optical subprocessors is distributed throughout the ship, augmenting the main cores. Within the habitable volume of the ship, most of these subprocessors are located near main corridor junctions for easy service and updating. While these subprocessors do not employ faster-than-light elements, the distributed processing networks improves over all system response and provides redundancy in emergency situations.
Both the Bridge and the Tactical Information Center have 30 dedicated subprocessors, allowing for the operation of ship’s systems and flight operations in the event of computer core failure. These subprocessors are linked to the main computer cores through several redundant, protected optical data network trunks, as well as through ultra-high frequency radio (RF) links, providing even emergency data communications with the bridge.
== Statistics ==
== Statistics ==



Revision as of 20:15, 14 August 2006

Template:Challenger-motto

File:Main pic.jpg
Millions of eyes watched the skies the morning the NASA shuttle Challenger, with it's seven person crew, lifted off to begin a new era in exploration through education. It's demise 73 seconds after liftoff can only be characterized not only as a loss of life but a loss of a dream for a brighter future.

That vision for a brighter future continues 400 years to the day of that tragic loss, with the commissioning of the Akira Classstarship USS Challenger. Her mission will be to inspire, to teach and to learn as we honor those who've gone on before us and seek to bring possibilities to those we come after us.

The Challenger's capabilities far exceed it's battle hardened exterior, to a crew of individuals who aspire to uphold the values of Starfleet and the desire to "see what's out there". The Borg, The Dominion, The Romulans...these are entities that the crew have faced, they will rely on their rememberances to help guide them as the future unfolds before them.

Challenger Computer Core System

Computer System The main computer system of any Starfleet vessel is arguably the most important single system used in the operation of the ship other than the crew. In many respects, the computer network is the central nervous system of the starship, and in many respects, is responsible for the operation and maintenance of every single system aboard the starship.

Crew interface for the computer system is maintained through the Library Computer and Retrieval System, or LCARS. The LCARS provides both tactile and auditory input for the users, incorporating highly specialized artificial intelligence subroutines and graphic displays for maximum ease of usage.

Number of computer cores Two; The primary core one occupies space on decks 7, 8 and 9 far astern. The secondary, emergency core is much smaller than the first and is located adjacent to Enviromental Control on Deck 16. The Core elements are based on FTL nanoprocessor units arranged into optical transtator clusters of 1,024 segments. In turn, each cluster is grouped into processing modules composed of 256 clusters controlled by a bank of sixteen isolinear chips. Each core comprises seven primary and three upper levels, each level containing an average of four modules.

Type of computer cores The updated Computer cores found on the Akira-class are newer versions of the Galaxy Class Isolinear Processing cores. The system is powered by a smaller, regulated EPS conduit directly from the warp core. Cooling of the isolinear loop is accomplished by a regenerative liquid nitrogen loop, which has been refit to allow a delayed-venting heat storage unit for "Silent Running." For missions, requirements on the computer core rarely exceed 45-50% of total core processing and storage capacity. The rest of the core is utilized for various scientific, tactical, or intelligence gathering missions - or to backup data in the event of a damaged core. Each core incorporates miniature subspace generators, which creates a symmetrical, nonpropulsive, field distortion of 3350 millicochranes within the faster-than-light (FTL) core elements. This permits data to be processed and passed at rates far exceeding the speed of light.

Core Memory Main memory storage for the primary computer core is provided by 2,048 dedicated modules of 144 isolinear optical storage chips. Under LCARS software control, these modules provide access to memory averaging around 4600 kiloquads/second. Total storage capacity of each module is about 630,000 kiloquads, depending on the current LCARS software configuration.

Subprocessors A network of 200 quaditronic optical subprocessors is distributed throughout the ship, augmenting the main cores. Within the habitable volume of the ship, most of these subprocessors are located near main corridor junctions for easy service and updating. While these subprocessors do not employ faster-than-light elements, the distributed processing networks improves over all system response and provides redundancy in emergency situations.

Both the Bridge and the Tactical Information Center have 30 dedicated subprocessors, allowing for the operation of ship’s systems and flight operations in the event of computer core failure. These subprocessors are linked to the main computer cores through several redundant, protected optical data network trunks, as well as through ultra-high frequency radio (RF) links, providing even emergency data communications with the bridge.

Statistics

  • Registry Number: NCC-12886
  • Class: Akira
  • Crew Compliment: Officers: 125
  • Enlisted Crew: 375
  • Total: 500
  • Civilians (Families): Not permitted
  • Maximum Capacity: 2000
  • Number of Decks: 19
  • Height: 87.43 Metres
  • Width: 316.67 Metres
  • Length: 464.43 Metres
  • Warp Engines: Two 920 LF-45 Advanced Linear
  • Warp Drive Units
  • Impulse Engines: Two U920 FIG-4 Subatomic Unified
  • Energy Impulse Units
  • Computer System: LCARS, M-16 Bio-Neural Gelpack
  • Isolinear III Processor
  • Speed: Cruising: Warp 6
  • Maximum: Warp 9.8
  • Strength Index: 1,493
  • Expected Duration: 80 Years
  • Minor Refit Cycle: 1 Years
  • Major Refit Cycle: 20 Years



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